Osmocom Open Build Service

osmo-trx.spec Changed

commit_5042156437c2844568dc8e706d569053a2642add.txt Added

commit_70ed3d586e9317f8a894e34fd349718478a7ec44.txt Deleted

osmo-trx_1.5.0.49.70ed.dsc -> osmo-trx_1.5.0.50.5042.dsc Changed

@@ -2,7 +2,7 @@
 Source: osmo-trx
 Binary: osmo-trx, osmo-trx-dbg, osmo-trx-uhd, osmo-trx-usrp1, osmo-trx-lms, osmo-trx-ipc, osmo-trx-doc
 Architecture: any all
-Version: 1.5.0.49.70ed
+Version: 1.5.0.50.5042
 Maintainer: Osmocom team <openbsc@lists.osmocom.org>
 Homepage: https://projects.osmocom.org/projects/osmotrx
 Standards-Version: 3.9.6
@@ -18,8 +18,8 @@
  osmo-trx-uhd deb net optional arch=any
  osmo-trx-usrp1 deb net optional arch=any
 Checksums-Sha1:
- 79c55128b52a7f66fefab0b68ec96f1526dfc5fc 1392960 osmo-trx_1.5.0.49.70ed.tar.xz
+ be3de9f98c53f7e65bdf1a312bd5e794e58de5e8 1393896 osmo-trx_1.5.0.50.5042.tar.xz
 Checksums-Sha256:
- 4ca42e5c8eae4e06b0c7fc18c234fcf500f7d59e167c86e2b556fab733ed78ff 1392960 osmo-trx_1.5.0.49.70ed.tar.xz
+ f976ee1644e987291f0661e5868cfefc6a1a47af7624382fc49a13c4f1fd4de6 1393896 osmo-trx_1.5.0.50.5042.tar.xz
 Files:
- cf7f83b93ceb29b3fcc6391ec3e1fc99 1392960 osmo-trx_1.5.0.49.70ed.tar.xz
+ 8b562741f1ffad84c6891ec6e05fde31 1393896 osmo-trx_1.5.0.50.5042.tar.xz

osmo-trx_1.5.0.49.70ed.tar.xz/.tarball-version -> osmo-trx_1.5.0.50.5042.tar.xz/.tarball-version Changed

osmo-trx_1.5.0.49.70ed.tar.xz/debian/changelog -> osmo-trx_1.5.0.50.5042.tar.xz/debian/changelog Changed

osmo-trx_1.5.0.49.70ed.tar.xz/osmocom-bb/include/l1ctl_proto.h -> osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/include/l1ctl_proto.h Changed

osmo-trx_1.5.0.49.70ed.tar.xz/osmocom-bb/include/l1gprs.h -> osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/include/l1gprs.h Changed

osmo-trx_1.5.0.49.70ed.tar.xz/osmocom-bb/src/host/layer23/include/osmocom/bb/common/ms.h -> osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/host/layer23/include/osmocom/bb/common/ms.h Changed

osmo-trx_1.5.0.49.70ed.tar.xz/osmocom-bb/src/host/layer23/include/osmocom/bb/modem/grr.h -> osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/host/layer23/include/osmocom/bb/modem/grr.h Changed

osmo-trx_1.5.0.49.70ed.tar.xz/osmocom-bb/src/host/layer23/src/common/l1ctl.c -> osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/host/layer23/src/common/l1ctl.c Changed

@@ -986,6 +986,35 @@
 	return 0;
 }
 
+/* Receive L1CTL_GPRS_RTS_IND */
+static int rx_l1_gprs_rts_ind(struct osmocom_ms *ms, struct msgb *msg)
+{
+	const struct l1ctl_gprs_rts_ind *ind = (void *)msg->l1h;
+
+	if (msgb_l1len(msg) < sizeof(*ind)) {
+		LOGP(DL1C, LOGL_ERROR,
+		     "Rx malformed GPRS RTS.ind (len=%u < %zu)\n",
+		     msgb_l1len(msg), sizeof(*ind));
+		return -EINVAL;
+	}
+	if (OSMO_UNLIKELY(ind->tn >= 8)) {
+		LOGP(DL1C, LOGL_ERROR,
+		     "Rx malformed GPRS RTS.ind (tn=%u)\n",
+		     ind->tn);
+		return -EINVAL;
+	}
+
+	DEBUGP(DL1C, "Rx RTS.ind (fn=%u, tn=%u, usf=%u)\n",
+	       ntohl(ind->fn), ind->tn, ind->usf);
+
+	/* distribute or drop */
+	if (ms->l1_entity.l1_gprs_rts_ind)
+		return ms->l1_entity.l1_gprs_rts_ind(ms, msg);
+
+	msgb_free(msg);
+	return 0;
+}
+
 /* Transmit L1CTL_GPRS_UL_BLOCK_REQ */
 int l1ctl_tx_gprs_ul_block_req(struct osmocom_ms *ms, uint32_t fn, uint8_t tn,
 			       const uint8_t *data, size_t data_len)
@@ -1132,6 +1161,9 @@
 	case L1CTL_GPRS_DL_BLOCK_IND:
 		rc = rx_l1_gprs_dl_block_ind(ms, msg);
 		break;
+	case L1CTL_GPRS_RTS_IND:
+		rc = rx_l1_gprs_rts_ind(ms, msg);
+		break;
 	default:
 		LOGP(DL1C, LOGL_ERROR, "Unknown MSG: %u\n", hdr->msg_type);
 		msgb_free(msg);

osmo-trx_1.5.0.49.70ed.tar.xz/osmocom-bb/src/host/layer23/src/modem/grr.c -> osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/host/layer23/src/modem/grr.c Changed

@@ -469,16 +469,15 @@
 		}
 	};
 	osmo_gprs_rlcmac_prim_lower_up(prim);
+}
 
-	/* Do not send RTS.ind if we got PTCCH/D */
-	if (fn % 104 == 12)
-		return;
-
-	/* Every fn % 13 == 12 we have either a PTCCH or an IDLE slot, thus
-	 * every fn % 13 ==  8 we add 5 frames, or 4 frames othrwise.  The
-	 * resulting value is first fn of the next block. */
-	const uint32_t rts_fn = GSM_TDMA_FN_SUM(fn, (fn % 13 == 8) ? 5 : 4);
-	prim = osmo_gprs_rlcmac_prim_alloc_l1ctl_pdch_rts_ind(ind->hdr.tn, rts_fn, ind->usf);
+static void handle_pdch_rts_ind(struct osmocom_ms *ms, struct msgb *msg)
+{
+	const struct l1ctl_gprs_rts_ind *ind = (void *)msg->l1h;
+	const uint32_t fn = osmo_load32be(&ind->fn);
+	struct osmo_gprs_rlcmac_prim *prim;
+
+	prim = osmo_gprs_rlcmac_prim_alloc_l1ctl_pdch_rts_ind(ind->tn, fn, ind->usf);
 	osmo_gprs_rlcmac_prim_lower_up(prim);
 }
 
@@ -693,6 +692,9 @@
 	case GRR_EV_PDCH_BLOCK_IND:
 		handle_pdch_block_ind(ms, (struct msgb *)data);
 		break;
+	case GRR_EV_PDCH_RTS_IND:
+		handle_pdch_rts_ind(ms, (struct msgb *)data);
+		break;
 	case GRR_EV_PDCH_RELEASE_REQ:
 		modem_sync_to_cell(ms);
 		osmo_fsm_inst_state_chg(fi, GRR_ST_PACKET_NOT_READY, 0, 0);
@@ -729,6 +731,7 @@
 				| S(GRR_EV_PDCH_DL_TBF_CFG_REQ)
 				| S(GRR_EV_PDCH_BLOCK_REQ)
 				| S(GRR_EV_PDCH_BLOCK_IND)
+				| S(GRR_EV_PDCH_RTS_IND)
 				| S(GRR_EV_PDCH_RELEASE_REQ),
 		.action = &grr_st_packet_transfer_action,
 		.onenter = &grr_st_packet_transfer_onenter,
@@ -747,6 +750,7 @@
 	OSMO_VALUE_STRING(GRR_EV_PDCH_DL_TBF_CFG_REQ),
 	OSMO_VALUE_STRING(GRR_EV_PDCH_BLOCK_REQ),
 	OSMO_VALUE_STRING(GRR_EV_PDCH_BLOCK_IND),
+	OSMO_VALUE_STRING(GRR_EV_PDCH_RTS_IND),
 	{ 0, NULL }
 };

osmo-trx_1.5.0.49.70ed.tar.xz/osmocom-bb/src/host/layer23/src/modem/rlcmac.c -> osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/host/layer23/src/modem/rlcmac.c Changed

osmo-trx_1.5.0.49.70ed.tar.xz/osmocom-bb/src/host/trxcon/include/osmocom/bb/trxcon/trxcon.h -> osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/host/trxcon/include/osmocom/bb/trxcon/trxcon.h Changed

osmo-trx_1.5.0.49.70ed.tar.xz/osmocom-bb/src/host/trxcon/src/sched_prim.c -> osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/host/trxcon/src/sched_prim.c Changed

osmo-trx_1.5.0.49.70ed.tar.xz/osmocom-bb/src/host/trxcon/src/trxcon_fsm.c -> osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/host/trxcon/src/trxcon_fsm.c Changed

@@ -369,6 +369,9 @@
 		return;
 	}
 
+	/* Store TSC for subsequent PDCH timeslot activation(s) */
+	trxcon->l1p.tsc = req->tsc;
+
 	if (config == GSM_PCHAN_PDCH)
 		osmo_fsm_inst_state_chg(fi, TRXCON_ST_PACKET_DATA, 0, 0);
 	else
@@ -522,15 +525,20 @@
 	struct l1sched_state *sched = trxcon->sched;
 
 	if (active) {
+		struct l1sched_lchan_state *lchan;
+		struct l1sched_ts *ts;
+
 		if (sched->tstn != NULL) /* already enabled */
 			return;
 		if (l1sched_configure_ts(sched, tn, GSM_PCHAN_PDCH) != 0)
 			return;
 		OSMO_ASSERT(sched->tstn != NULL);
+		ts = sched->tstn;
 
-		l1sched_activate_lchan(sched->tstn, L1SCHED_PDTCH);
-		l1sched_activate_lchan(sched->tstn, L1SCHED_PTCCH);
-		/* FIXME: set TSC for both lchans */
+		l1sched_activate_lchan(ts, L1SCHED_PDTCH);
+		l1sched_activate_lchan(ts, L1SCHED_PTCCH);
+		llist_for_each_entry(lchan, &ts->lchans, list)
+			lchan->tsc = trxcon->l1p.tsc;
 	} else {
 		l1sched_del_ts(sched, tn);
 	}
@@ -607,6 +615,7 @@
 		const struct trxcon_param_rx_data_ind *ind = data;
 		struct l1gprs_prim_dl_block_ind block_ind;
 		struct msgb *msg;
+		uint8_t usf = 0xff;
 
 		block_ind = (struct l1gprs_prim_dl_block_ind) {
 			.hdr = {
@@ -627,7 +636,14 @@
 		else
 			block_ind.meas.ber10k = 10000 * ind->n_errors / ind->n_bits_total;
 
-		msg = l1gprs_handle_dl_block_ind(trxcon->gprs, &block_ind);
+		msg = l1gprs_handle_dl_block_ind(trxcon->gprs, &block_ind, &usf);
+		if (msg != NULL)
+			trxcon_l1ctl_send(trxcon, msg);
+		/* Every fn % 13 == 12 we have either a PTCCH or an IDLE slot, thus
+		 * every fn % 13 ==  8 we add 5 frames, or 4 frames othrwise.  The
+		 * resulting value is first fn of the next block. */
+		const uint32_t rts_fn = GSM_TDMA_FN_SUM(ind->frame_nr, (ind->frame_nr % 13 == 8) ? 5 : 4);
+		msg = l1gprs_handle_rts_ind(trxcon->gprs, rts_fn, ind->chan_nr & 0x07, usf);
 		if (msg != NULL)
 			trxcon_l1ctl_send(trxcon, msg);
 		break;

osmo-trx_1.5.0.49.70ed.tar.xz/osmocom-bb/src/host/virt_phy/src/virt_prim_pdch.c -> osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/host/virt_phy/src/virt_prim_pdch.c Changed

@@ -22,6 +22,7 @@
 #include <osmocom/core/utils.h>
 #include <osmocom/gsm/gsm_utils.h>
 #include <osmocom/gsm/protocol/gsm_08_58.h>
+#include <osmocom/gsm/gsm0502.h>
 
 #include <osmocom/bb/virtphy/l1ctl_sap.h>
 #include <osmocom/bb/virtphy/virt_l1_sched.h>
@@ -75,6 +76,7 @@
 {
 	struct l1gprs_prim_dl_block_ind ind;
 	struct msgb *nmsg;
+	uint8_t usf = 0xff;
 
 	if (ms->gprs == NULL)
 		return;
@@ -93,7 +95,14 @@
 		.data_len = msgb_length(msg),
 	};
 
-	nmsg = l1gprs_handle_dl_block_ind(ms->gprs, &ind);
+	nmsg = l1gprs_handle_dl_block_ind(ms->gprs, &ind, &usf);
+	if (nmsg != NULL)
+		l1ctl_sap_tx_to_l23_inst(ms, nmsg);
+	/* Every fn % 13 == 12 we have either a PTCCH or an IDLE slot, thus
+	 * every fn % 13 ==  8 we add 5 frames, or 4 frames othrwise.  The
+	 * resulting value is first fn of the next block. */
+	const uint32_t rts_fn = GSM_TDMA_FN_SUM(fn, (fn % 13 == 8) ? 5 : 4);
+	nmsg = l1gprs_handle_rts_ind(ms->gprs, rts_fn, tn, usf);
 	if (nmsg != NULL)
 		l1ctl_sap_tx_to_l23_inst(ms, nmsg);
 }

osmo-trx_1.5.0.49.70ed.tar.xz/osmocom-bb/src/shared/l1gprs.c -> osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/shared/l1gprs.c Changed

@@ -674,7 +674,8 @@
 	(((ind)->hdr.fn % 104) == 12)
 
 struct msgb *l1gprs_handle_dl_block_ind(struct l1gprs_state *gprs,
-					const struct l1gprs_prim_dl_block_ind *ind)
+					const struct l1gprs_prim_dl_block_ind *ind,
+					uint8_t *usf)
 {
 	const struct l1gprs_pdch *pdch = NULL;
 	struct l1ctl_gprs_dl_block_ind *l1bi;
@@ -743,6 +744,7 @@
 	case OSMO_GPRS_CS3:
 	case OSMO_GPRS_CS4:
 		l1bi->usf = ind->data0 & 0x07;
+		*usf = l1bi->usf;
 		/* Determine whether to include the payload or not */
 		if (l1gprs_pdch_filter_dl_block(pdch, ind->data))
 			memcpy(msgb_put(msg, ind->data_len), ind->data, ind->data_len);
@@ -758,3 +760,46 @@
 
 	return msg;
 }
+
+struct msgb *l1gprs_handle_rts_ind(struct l1gprs_state *gprs, uint32_t fn, uint8_t tn, uint8_t usf)
+{
+	const struct l1gprs_pdch *pdch = NULL;
+	struct l1ctl_gprs_rts_ind *l1bi;
+	struct msgb *msg;
+
+	pdch = &gprs->pdchtn;
+
+	LOGP_PDCH(pdch, LOGL_DEBUG,
+		  "Rx RTS.ind (%s, fn=%u, usf=%u)\n",
+		  ((fn % 104) == 12) ? "PTCCH" : "PDTCH",
+		  fn, usf);
+
+	l1gprs_check_pending_tbfs(gprs, fn);
+
+	if (pdch->ul_tbf_count + pdch->dl_tbf_count == 0) {
+		if (pdch->pending_ul_tbf_count + pdch->pending_dl_tbf_count > 0)
+			LOGP_PDCH(pdch, LOGL_DEBUG,
+				  "Rx RTS.ind (fn=%u, usf=%u), but this PDCH has no active TBFs yet\n",
+				  fn, usf);
+		else
+			LOGP_PDCH(pdch, LOGL_ERROR,
+				  "Rx RTS.ind (fn=%u, usf=%u), but this PDCH has no configured TBFs\n",
+				  fn, usf);
+		return NULL;
+	}
+
+	msg = l1gprs_l1ctl_msgb_alloc(L1CTL_GPRS_RTS_IND);
+	if (OSMO_UNLIKELY(msg == NULL)) {
+		LOGP_GPRS(gprs, LOGL_ERROR, "l1gprs_l1ctl_msgb_alloc() failed\n");
+		return NULL;
+	}
+
+	l1bi = (void *)msgb_put(msg, sizeof(*l1bi));
+	*l1bi = (struct l1ctl_gprs_rts_ind) {
+		.fn = htonl(fn),
+		.tn = tn,
+		.usf = usf,
+	};
+
+	return msg;
+}

osmo-trx_1.5.0.49.70ed.tar.xz/osmocom-bb/src/target/firmware/Makefile -> osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/target/firmware/Makefile Changed

osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/target/firmware/board/tr800 Added

osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/target/firmware/board/tr800/afcparams.c Added

@@ -0,0 +1,52 @@
+/*
+ * This code was written by Mychaela Falconia <falcon@freecalypso.org>
+ * who refuses to claim copyright on it and has released it as public domain
+ * instead. NO rights reserved, all rights relinquished.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <rf/vcxocal.h>
+
+/*
+ * Here is a representative set of AFC Psi parameters that has been
+ * calibrated by iWOW's factory on a TR-800 module, as recorded
+ * in the /gsm/rf/afcparams file:
+ *
+ * Psi_sta_inv: 4387
+ * Psi_st: 12
+ * Psi_st_32: 783154
+ * Psi_st_inv: 5484
+ *
+ * The following AFC slope number is the closest OsmocomBB-style afc_slope
+ * integer corresponding to these Psi numbers; the true value is somewhere
+ * between 358 and 359.
+ *
+ * Please note that all AFC parameters (both Psi and linear) have been
+ * calibrated per unit by iWOW's factory, and they do differ from unit
+ * to unit.  Both iWOW and FreeCalypso firmwares make direct use of
+ * per-unit calibrated numbers, but OsmocomBB architecture cannot make
+ * use of them - hence AFC performance with OBB may be significantly
+ * poorer than with either iWOW or FC firmware.  The present code has
+ * been contributed by Mother Mychaela solely as a harm reduction measure,
+ * and does NOT constitute any kind of approved production solution -
+ * you've been warned!
+ */
+int16_t afc_slope = 358;
+
+/*
+ * The compiled-in AFC initial DAC value below is the same as was used by
+ * the old OsmocomBB code written for Mot C1xx phones, but it will normally
+ * be overridden by the per-unit factory calibration value read from the
+ * /gsm/rf/afcdac file in FFS.
+ */
+int16_t afc_initial_dac_value = -700;

osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/target/firmware/board/tr800/init.c Added

@@ -0,0 +1,257 @@
+/* Initialization for the iWOW TR-800 modem */
+
+/*
+ * This code was written by Mychaela Falconia <falcon@freecalypso.org>
+ * who refuses to claim copyright on it and has released it as public domain
+ * instead. NO rights reserved, all rights relinquished.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include <debug.h>
+#include <ctors.h>
+#include <memory.h>
+#include <board.h>
+#include <keypad.h>
+#include <console.h>
+#include <flash/cfi_flash.h>
+#include <tiffs.h>
+
+#include <calypso/irq.h>
+#include <calypso/clock.h>
+#include <calypso/dma.h>
+#include <calypso/rtc.h>
+#include <calypso/timer.h>
+#include <uart.h>
+
+#include <comm/sercomm.h>
+#include <comm/timer.h>
+
+#include <abb/twl3025.h>
+#include <rf/trf6151.h>
+#include "keymap.h"
+
+#define ARMIO_LATCH_OUT 0xfffe4802
+#define IO_CNTL_REG	0xfffe4804
+#define ARM_CONF_REG	0xfffef006
+#define ASIC_CONF_REG	0xfffef008
+#define IO_CONF_REG	0xfffef00a
+
+static void board_io_init(void)
+{
+	uint16_t reg;
+
+	reg = readw(ASIC_CONF_REG);
+	/* DSR_MODEM/LPG pin is unconnected - make it LPG dummy output */
+	reg |= (1 << 6);
+	/* TWL3025: Set SPI+RIF RX clock to rising edge */
+	reg |= (1 << 13) | (1 << 14);
+	writew(reg, ASIC_CONF_REG);
+
+	/*
+	 * Calypso signals GPIO0, TSPDI/GPIO4, BCLKX/GPIO6, MCUEN1/GPIO8 and
+	 * MCUEN2/GPIO13 are unused and unconnected inside the TR-800 module.
+	 * Configure them as dummy outputs in order to prevent floating inputs.
+	 */
+	writew(0x0215, IO_CONF_REG);
+	writew(0xDC0E, IO_CNTL_REG);
+	writew(0x0000, ARMIO_LATCH_OUT);
+
+	/* configure ADD(22), needed for second half of flash */
+	reg = readw(ARM_CONF_REG);
+	reg |= (1 << 3);
+	writew(reg, ARM_CONF_REG);
+}
+
+/*
+ * A total of 8 Calypso GPIO/multifunction pins (3 pure GPIO, 5 multifunction)
+ * are brought out on the TR-800 module, with module users (application board
+ * designers) explicitly allowed to wire them in whichever way is needed for
+ * the custom application at hand.  6 of these pins power up as inputs.
+ * Should the firmware leave them as inputs, or switch them to dummy outputs
+ * to prevent floating inputs?  The answer in FreeCalypso (for TR-800 modules
+ * rebranded as FC Tango) is a special file written into FFS: /etc/tango-pinmux.
+ * This board wiring config file tells the firmware what it should do with each
+ * of the 8 GPIO/multifunction pins in question; the format is defined here:
+ *
+ * https://www.freecalypso.org/hg/freecalypso-docs/file/tip/Tango-pinmux
+ *
+ * The following function reads /etc/tango-pinmux from FFS and applies the pin
+ * multiplexing configuration encoded therein.  If this file is missing, all
+ * pins in question are left in their default power-up state.
+ */
+static void board_pinmux_init(void)
+{
+	uint8_t pinmux4;
+	int rc;
+	uint16_t conf_reg, cntl_reg, out_reg;
+
+	rc = tiffs_read_file_fixedlen("/etc/tango-pinmux", pinmux, 4);
+	if (rc < 0)
+		return;		/* error msg already printed */
+	if (rc == 0) {
+		puts("Warning: /etc/tango-pinmux not found, pins left in default power-up state\n");
+		return;
+	}
+	/* read-modify-write registers */
+	conf_reg = readw(IO_CONF_REG);
+	cntl_reg = readw(IO_CNTL_REG);
+	out_reg = readw(ARMIO_LATCH_OUT);
+	/* GPIO1 */
+	if (pinmux0 & 0x80) {
+		cntl_reg &= ~(1 << 1);
+		if (pinmux0 & 0x01)
+			out_reg |= (1 << 1);
+		else
+			out_reg &= ~(1 << 1);
+	}
+	/* GPIO2 */
+	if (pinmux1 & 0x08) {
+		/* pinmux says it's DCD output - set it high */
+		cntl_reg &= ~(1 << 2);
+		out_reg |= (1 << 2);
+	} else if (pinmux1 & 0x02) {
+		/* generic output */
+		cntl_reg &= ~(1 << 2);
+		if (pinmux1 & 0x01)
+			out_reg |= (1 << 2);
+		else
+			out_reg &= ~(1 << 2);
+	}
+	/* GPIO3 */
+	if (pinmux1 & 0x20) {
+		/* generic output */
+		cntl_reg &= ~(1 << 3);
+		if (pinmux1 & 0x10)
+			out_reg |= (1 << 3);
+		else
+			out_reg &= ~(1 << 3);
+	}
+	/* MCSI or GPIO? */
+	if (pinmux2 & 0x80) {
+		/* MCSI pins switch to GPIO */
+		conf_reg |= 0x1E0;
+		writew(conf_reg, IO_CONF_REG);
+		/* GPIO9 */
+		if (pinmux3 & 0x10) {
+			cntl_reg &= ~(1 << 9);
+			if (pinmux3 & 0x01)
+				out_reg |= (1 << 9);
+			else
+				out_reg &= ~(1 << 9);
+		} else
+			cntl_reg |= (1 << 9);
+		/* GPIO10 */
+		if (pinmux3 & 0x20) {
+			cntl_reg &= ~(1 << 10);
+			if (pinmux3 & 0x02)
+				out_reg |= (1 << 10);
+			else
+				out_reg &= ~(1 << 10);
+		}
+		/* GPIO11 */
+		if (pinmux3 & 0x40) {
+			cntl_reg &= ~(1 << 11);
+			if (pinmux3 & 0x04)
+				out_reg |= (1 << 11);
+			else
+				out_reg &= ~(1 << 11);
+		}
+		/* GPIO12 */
+		if (pinmux3 & 0x80) {
+			cntl_reg &= ~(1 << 12);
+			if (pinmux3 & 0x08)
+				out_reg |= (1 << 12);
+			else
+				out_reg &= ~(1 << 12);
+		}
+	}
+	writew(out_reg, ARMIO_LATCH_OUT);
+	writew(cntl_reg, IO_CNTL_REG);
+}
+
+void board_init(int with_irq)
+{
+	/*
+	 * Configure the memory interface.
+	 * nCS0 and nCS1 are internal flash and RAM - please refer to
+	 * this technical article for an explanation of timing parameters:
+https://www.freecalypso.org/hg/freecalypso-docs/file/tip/MEMIF-wait-states
+	 */
+	calypso_mem_cfg(CALYPSO_nCS0, 4, CALYPSO_MEM_16bit, 1);
+	calypso_mem_cfg(CALYPSO_nCS1, 4, CALYPSO_MEM_16bit, 1);
+	/* nCS2 and nCS3 are brought out for user-added custom hw */
+	calypso_mem_cfg(CALYPSO_nCS2, 5, CALYPSO_MEM_16bit, 1);
+	calypso_mem_cfg(CALYPSO_nCS3, 5, CALYPSO_MEM_16bit, 1);
+	/* Calypso nCS4 is not brought out on TR-800, hence a dummy */
+	calypso_mem_cfg(CALYPSO_CS4, 0, CALYPSO_MEM_8bit, 1);
+	calypso_mem_cfg(CALYPSO_nCS6, 0, CALYPSO_MEM_32bit, 1);
+	calypso_mem_cfg(CALYPSO_nCS7, 0, CALYPSO_MEM_32bit, 0);
+
+	/* Set VTCXO_DIV2 = 1, configure PLL for 104 MHz and give ARM half of that */
+	calypso_clock_set(2, CALYPSO_PLL13_104_MHZ, ARM_MCLK_DIV_2);
+
+	/* Configure the RHEA bridge with some sane default values */
+	calypso_rhea_cfg(0, 0, 0xff, 0, 1, 0, 0);
+
+	/* Initialize board-specific GPIO */
+	board_io_init();
+
+	/* Enable bootrom mapping to route exception vectors to RAM */
+	calypso_bootrom(with_irq);
+	calypso_exceptions_install();
+
+	/* Initialize interrupt controller */
+	if (with_irq)
+		irq_init();
+
+	/*
+	 * The choice of which UART should be used for what is arbitrary -
+	 * change to taste!
+	 */
+	sercomm_bind_uart(UART_MODEM);
+	cons_bind_uart(UART_IRDA);
+
+	/* initialize MODEM UART to be used for sercomm */
+	uart_init(UART_MODEM, with_irq);
+	uart_baudrate(UART_MODEM, UART_115200);
+
+	/* Initialize IRDA UART to be used for old-school console code. */
+	uart_init(UART_IRDA, with_irq);
+	uart_baudrate(UART_IRDA, UART_115200);
+
+	/* Initialize hardware timers */
+	hwtimer_init();
+
+	/* Initialize DMA controller */
+	dma_init();
+
+	/* Initialize real time clock */
+	rtc_init();
+
+	/* Initialize system timers (uses hwtimer 2) */
+	timer_init();
+
+	/* Initialize keypad driver */
+	keypad_init(keymap, with_irq);
+
+	/* Initialize ABB driver (uses SPI) */
+	twl3025_init();
+
+	/* Initialize TIFFS reader (15 sectors of 64 KiB each) */
+	tiffs_init(0x700000, 0x10000, 15);
+
+	/* Initialize configurable pin multiplexing */
+	board_pinmux_init();
+}

osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/target/firmware/board/tr800/keymap.h Added

@@ -0,0 +1,87 @@
+/*
+ * This code was written by Mychaela Falconia <falcon@freecalypso.org>
+ * who refuses to claim copyright on it and has released it as public domain
+ * instead. NO rights reserved, all rights relinquished.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * The TR-800 module itself does not prescribe any particular keypad
+ * layout - instead all 5 KBC lines and all 5 KBR lines are simply
+ * brought out, allowing user applications to implement any desired
+ * keypad up to 5x5 buttons.  When designing keypads for development
+ * boards (whether TR800-based or "raw" Calypso), Mother Mychaela's
+ * preference is to follow TI's original D-Sample key layout:
+
+	Main keypad (21 buttons):
+
+	L. Soft		R. Soft
+		5-way nav
+	Green		Red
+	1	2	3
+	4	5	6
+	7	8	9
+	*	0	#
+
+	Left side buttons: VOL+ / VOL-
+	Right side button: generic
+
+	Row/column matrix connections:
+
+		KBC0	KBC1	KBC2	KBC3	KBC4
+	KBR0	Green	VOL-	VOL+	L_Soft	Nav_left
+	KBR1	1	2	3	R_Side	Nav_right
+	KBR2	4	5	6	R_Soft	Nav_up
+	KBR3	7	8	9	unused	Nav_down
+	KBR4	*	0	#	unused	Nav_center
+
+	The red button is out-of-matrix PWON.
+
+ * If anyone has an original iWOW DSK board, the connection of
+ * "CALL" and "1" buttons on that board also matches the present
+ * D-Sample keymap.
+ */
+
+static const uint8_t keymap = {
+	KEY_0		= 9,
+	KEY_1		= 1,
+	KEY_2		= 6,
+	KEY_3		= 11,
+	KEY_4		= 2,
+	KEY_5		= 7,
+	KEY_6		= 12,
+	KEY_7		= 3,
+	KEY_8		= 8,
+	KEY_9		= 13,
+	KEY_STAR	= 4,
+	KEY_HASH	= 14,
+	KEY_MENU	= 24,
+	KEY_LEFT_SB	= 15,
+	KEY_RIGHT_SB	= 17,
+	KEY_UP	= 22,
+	KEY_DOWN	= 23,
+	KEY_LEFT	= 20,
+	KEY_RIGHT	= 21,
+	KEY_OK	= 0,
+/* power button is not connected to keypad scan matrix but to TWL3025 */
+	KEY_POWER	= 31,
+/* D-Sample left side buttons for volume up/down control */
+	KEY_MINUS	= 5,
+	KEY_PLUS	= 10,
+/*
+ * D-Sample right side button can be seen as equivalent to
+ * Pirelli DP-L10 camera button, except for reversed history:
+ * D-Sample existed first and was used by the designers of the
+ * Pirelli DP-L10 phone as their starting point.
+ */
+	KEY_CAMERA	= 16,
+};

osmo-trx_1.5.0.50.5042.tar.xz/osmocom-bb/src/target/firmware/board/tr800/rffe_leo_quadband.c Added

@@ -0,0 +1,194 @@
+/*
+ * This code was written by Mychaela Falconia <falcon@freecalypso.org>
+ * who refuses to claim copyright on it and has released it as public domain
+ * instead. NO rights reserved, all rights relinquished.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * This module implements RFFE control for TI's original Leonardo+
+ * quadband RFFE, depicted on page 4 of this 2011-find schematic drawing:
+ *
+ * https://www.freecalypso.org/pub/GSM/Calypso/Leonardo_plus_quadband_schem.pdf
+ *
+ * This TI-original quadband RFFE is reproduced verbatim on the TR-800
+ * packaged module by iWOW.
+ *
+ * The present C code is based on ../gta0x/rffe_gta0x_triband.c,
+ * controlling Openmoko's triband RFFE which is very closely based on
+ * Leonardo, with only a few control signal permutations.
+ *
+ * The present code addition by Mother Mychaela merely brings the TR-800 hw
+ * target to the same level of support that already existed in OBB since
+ * forever for Compal/Motorola and Openmoko GTA01/02 targets, and more
+ * recently GTM900 and FCDEV3B - it does NOT fix the problem of overly
+ * simplistic RFFE control timing and other oversimplifications which OBB
+ * exhibits in comparison to the official firmware maintained by the
+ * custodians of the Calypso+Iota+RF chipset (formerly TI, now FreeCalypso).
+ * These massive oversimplifications which OBB exhibits in comparison to
+ * officially approved production firmwares result in OBB's radio transmissions
+ * being SEVERELY out of compliance (as observed with even the simplest tests
+ * with a CMU200 RF test instrument), thus anyone who runs the present code
+ * with Tx enabled outside of a Faraday cage will very likely cause
+ * interference and disruption to public communication networks!  Furthermore,
+ * if you go on with running OBB with Tx enabled after having read this
+ * warning, the resulting interference and disruption to public communication
+ * networks can be considered intentional on your part, which is likely to be
+ * seen as a more severe offense.
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include <debug.h>
+#include <memory.h>
+#include <rffe.h>
+#include <calypso/tsp.h>
+#include <rf/trf6151.h>
+
+/*
+ * OsmocomBB's definition of system inherent gain is similar to what is
+ * called "magic gain" (GMagic) in TI's architecture, except that TI's
+ * GMagic includes TRF6151 LNA gain whereas OBB's definition of system
+ * inherent gain does not.  TI's GMagic is also reckoned in half-dB units
+ * instead of integral dB.
+ *
+ * The canonical GMagic number for Leonardo/TR-800 RFFE is 200, both in
+ * iWOW's original calibration and as confirmed with CMU200 measurements
+ * at FreeCalypso HQ.  GMagic=200 in TI's universe is equivalent to
+ * OsmocomBB's "system inherent gain" of 73 dB.
+ */
+#define SYSTEM_INHERENT_GAIN	73
+
+/* describe how the RF frontend is wired on Leonardo and TR-800 */
+
+#define		RITA_RESET	TSPACT(0)	/* Reset of the Rita TRF6151 */
+#define		PA_ENABLE	TSPACT(9)	/* Enable the Power Amplifier */
+#define		PA_BAND_SEL	TSPACT(3)	/* PA band select, 1=DCS/PCS */
+
+/* All FEM controls are low-active */
+#define		FEM_7		TSPACT(2)	/* FEM pin 7 */
+#define		FEM_8		TSPACT(1)	/* FEM pin 8 */
+#define		FEM_9		TSPACT(4)	/* FEM pin 9 */
+
+#define		IOTA_STROBE	TSPEN(0)	/* Strobe for the Iota TSP */
+#define		RITA_STROBE	TSPEN(2)	/* Strobe for the Rita TSP */
+
+/* switch RF Frontend Mode */
+void rffe_mode(enum gsm_band band, int tx)
+{
+	uint16_t tspact = tsp_act_state();
+
+	/* First we mask off all bits from the state cache */
+	tspact &= ~PA_ENABLE;
+	tspact &= ~PA_BAND_SEL;
+	tspact |= FEM_7 | FEM_8 | FEM_9; /* low-active */
+
+	switch (band) {
+	case GSM_BAND_850:
+		tspact &= ~FEM_9;
+		break;
+	case GSM_BAND_900:
+	case GSM_BAND_1800:
+	case GSM_BAND_1900:
+		break;
+	default:
+		/* TODO return/signal error here */
+		break;
+	}
+
+#ifdef CONFIG_TX_ENABLE
+	/* Then we selectively set the bits on, if required */
+	if (tx) {
+		switch (band) {
+		case GSM_BAND_850:
+		case GSM_BAND_900:
+			tspact |= FEM_9;
+			tspact &= ~FEM_7;
+			break;
+		case GSM_BAND_1800:
+		case GSM_BAND_1900:
+			tspact &= ~FEM_8;
+			tspact |= PA_BAND_SEL;
+			break;
+		default:
+			break;
+		}
+		tspact |= PA_ENABLE;
+	}
+#endif /* TRANSMIT_SUPPORT */
+
+	tsp_act_update(tspact);
+}
+
+/* Returns RF wiring */
+uint32_t rffe_get_rx_ports(void)
+{
+	return (1 << PORT_LO) | (1 << PORT_DCS1800) | (1 << PORT_PCS1900);
+}
+
+uint32_t rffe_get_tx_ports(void)
+{
+	return (1 << PORT_LO) | (1 << PORT_HI);
+}
+
+/* Returns need for IQ swap */
+int rffe_iq_swapped(uint16_t band_arfcn, int tx)
+{
+	return trf6151_iq_swapped(band_arfcn, tx);
+}
+
+
+#define MCU_SW_TRACE	0xfffef00e
+#define ARM_CONF_REG	0xfffef006
+
+void rffe_init(void)
+{
+	uint16_t reg;
+
+	reg = readw(ARM_CONF_REG);
+	reg &= ~(1 << 7);	/* TSPACT4 I/O function, not nRDYMEM */
+	writew(reg, ARM_CONF_REG);
+
+	reg = readw(MCU_SW_TRACE);
+	reg &= ~(1 << 1);	/* TSPACT9 I/O function, not MAS(1) */
+	writew(reg, MCU_SW_TRACE);
+
+	/* Configure the TSPEN which is connected to the TWL3025 */
+	tsp_setup(IOTA_STROBE, 1, 0, 0);
+
+	trf6151_init(RITA_STROBE, RITA_RESET);
+}
+
+uint8_t rffe_get_gain(void)
+{
+	return trf6151_get_gain();
+}
+
+void rffe_set_gain(uint8_t dbm)
+{
+	trf6151_set_gain(dbm);
+}
+
+const uint8_t system_inherent_gain = SYSTEM_INHERENT_GAIN;
+
+/* Given the expected input level of exp_inp dBm/8 and the target of target_bb
+ * dBm8, configure the RF Frontend with the respective gain */
+void rffe_compute_gain(int16_t exp_inp, int16_t target_bb)
+{
+	trf6151_compute_gain(exp_inp, target_bb);
+}
+
+void rffe_rx_win_ctrl(int16_t exp_inp, int16_t target_bb)
+{
+	/* FIXME */
+}

Changes of Revision 30